Chen Jia Jia

Senior Lecturer

Research Interests:
Dr Chen’s current research interests are digital filter design and synthesis, digital signal processing, digital image fusion and spatial audio signal processing.

Pillar / Cluster: Engineering Product Development

 

 
  • Jiajia Chen, Chip-Hong Chang*, Jiatao Ding, Rui Qiao and Mathias Faust, “Tap Delay-and-Accumulate Cost Aware Coefficient Synthesis Algorithm for the Design of Area-Power Efficient FIR Filters,” accepted by IEEE Transactions on Circuits and Systems I, July 2017.
  • Jiajia Chen, Chip-Hong Chang, Yujia Wang, Juan Zhao and Susanto Rahardja*, “New Hardware and Power Efficient Sporadic Logarithmic Shifters for DSP Applications,” accepted by IEEE Transactions on Computer-Aided-Designs, July 2017.
  • S. Liu, Jiajia Chen*, Chip-Hong Chang and Ye Ai, “A New Accurate and Fast Homography Computation Algorithm for Sports and Traffic Video Analysis,” accepted by IEEE Transactions on Circuits and Systems for Video Technology, July 2017.
  • Jiajia Chen*, Jinghong Tan, Chip-Hong Chang and Feng Feng, “A New Cost-Aware Sensitivity-Driven Algorithm for the Design of FIR Filters,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 6, pp. 1588 – 1598, June 2017.
  • Shumin Liu, Jiaxuan Zhang and Jiajia Chen*, “Decision Map Refinement by Dynamic Programming for Multi-focus Image Fusion,” accepted by IEEE Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, Aug. 2017.
  • Y. Sun and Jiajia Chen*, “A New Weighted Decision Making Method for Accurate Sound Source Localization”, accepted by The 2nd International Conference on Intelligent and Interactive Systems and Applications, June 2017.
  • S. Liu and Jiajia Chen*, “A New Hybrid Multi-focus Image Fusion Algorithm by Dual DWT and Focused Region Decision Map,” IEEE Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, pp. 1-7, DOI: 10.1109/APSIPA.2016.7820864, Dec. 2016.
  • J. Zhao, Y. Wang, Jiajia Chen* and F. Feng, “A New Area-efficient FIR Filter Design Algorithm by Dynamic Programming,” IEEE European Signal Processing Conference, pp. 1853 – 1856, DOI: 10.1109/EUSIPCO.2016.7760569, Aug. 2016.
  • J. Ding, Jiajia Chen* and Chip-Hong Chang, “A New Paradigm of Common Subexpression Elimination by Unification of Addition and Subtraction,” IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, vol. 35, no. 10, pp. 1605 – 1617, Oct. 2016.
  • F. Feng, Jiajia Chen* and Chip-Hong Chang, “Hypergraph Based Minimum Arborescence Algorithm for the Optimization and Reoptimization of Multiple Constant Multiplications,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 63, no. 2, pp. 233-244, Feb. 2016.
  • J. Tan and Jiajia Chen*, “Low Complexity and Quasi-Linear Phase IIR Filters Design Based on Iterative Convex Optimization,” IEEE Asia-Pacific Conference on Circuits and Systems, pp. 603 – 606, DOI: 10.1109/APCCAS.2016.7804042, Dec. 2016.
  • Jiajia Chen*, Chip-Hong Chang, Feng Feng, Weiao Ding and Jiatao Ding, “Novel Design Algorithm for Low Complexity Programmable FIR Filters Based on Extended Double Base Number System,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, no. 1, pp. 224-233, Jan. 2015.
  • Jiajia Chen* and Jiatao Ding, “New Algorithm for Design of Low Complexity Twiddle Factor Multipliers in Radix-2 FFT,” IEEE ISCAS, pp. 958-961, May 2015.
  • W. Ding and Jiajia Chen*, “Design of Low Complexity Programmable FIR Filters Using Multiplexers Array Optimization,” IEEE ISCAS, pp. 2960-2963, May 2015.
  • Y. Wang and Jiajia Chen*, “New Design for Low Complexity and Low Power Partial Programmable Shifters,” IEEE ASICON, pp. 1-4, DOI: 10.1109/ASICON.2015.7516931, Nov. 2015.
  • Y. Wang and Jiajia Chen*, “New Design Algorithm for Low Complexity Programmable Shifters by Integer Partition,” International Researcher Club Conference on Science, Engineering and Technology, May, 2015.
  • F. Feng and Jiajia Chen*, “Design Automations of Efficient Complexity Estimation for Digital Integrated Circuit Design,” International Researcher Club Conference on Science, Engineering and Technology, May, 2015.
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